Can TSMC get the semiconductor industry to play by its rules for 90-nanometer chips?
Play by our rules and reap the rewards. And, oh by the way, we may choose not to play if you don't go along with our rules.
This carrot and stick influence game is being trotted out by the industry's largest semiconductor foundry: Taiwan Semiconductor Manufacturing Corp. (TSMC). It plans to streamline chip design and manufacturing by dictating the design rules for the next generation of chips. Go along with its game plan and TSMC says its partners will get chips built more quickly and with a higher yield. Refuse and they face the unsaid consequences: Maybe we won't play with you.
But will the chip makers with their own manufacturing facilities and fabless chip companies pattern 90nm semiconductors, built on 300mm wafers, using a predefined set of rules dictated by a giant foundry? Or will the designers continue to specify how the chip will be built, choosing their own IP libraries and design rules?
On one side of the debate, Hsin-Chu, Taiwan-based TSMC, the world's largest pure-play foundry, and its assortment of intellectual property (IP) partners are promoting a plan to use a predefined set of design rules and prequalifed IP libraries and process modules. Doing so, they claim, will allow chip companies to get to market faster and for less money than using traditional means, and if others adopt the TSMC process it will also make designs more portable.
On the other side of the debate are foundries such as Taipei, Taiwan-based United Microelectronics Corp. (UMC) and Singapore-based Chartered Semiconductor Manufacturing Ltd. They plan to continue to operate in a business-as-usual mode, with foundries suggesting a set of design rules, but working with the customer's rules and IP if requested. This approach, they claim, provides the greatest amount of flexibility to chip designers.
"The definition of a foundry is that the customer gets complete freedom of choice, versus the ASIC [application-specific integrated circuit] model, where you give up complete control in exchange for complete production" handled by the foundry, says San Jose, CA-based Michael Buehler-Garcia, Chartered's vice president of worldwide business development. This foundry-versus-ASIC model is at the core of the debate, he says, and should be the customer's focus.
The flashpoint for this debate is Nexsys, a TSMC-branded program that the company hopes will cement its leadership in the pure-play foundry market. This program, which the company launched with great fanfare and a whirlwind national tour, defines its SoC strategy to use a predetermined set of design rules for 90nm nodes. But are these design rules - the basic blueprint a foundry uses when it builds a semiconductor - a technological breakthrough or a clever marketing ploy? That's the question burning through the fabless semiconductor market.
To put this size of chip in perspective, 90nm is roughly 778 times thinner than the width of an average human hair, assuming the average human hair is 70 microns, or 70,000nm. A 300mm wafer is roughly 12 inches across.
Generally speaking, a company can get from hundreds to several thousand chips from a single 300mm wafer, according to a TSMC spokesman, depending on the size and complexity of the chip. A 90nm node generally will enable a die size reduction of 30% to 40% over today's 130nm size, assuming the chip's design remains the same. And as customers pack more functionality into the chip, the chip also benefits from a performance increase due to the shorter gate lengths hence the strategic push toward SoC designs.TSMC's strategy
"Designing an SoC is like making origami," says Genda Hu, vice president of corporate marketing for TSMC. The detail is so fine, he says, that you could end up with lots of failed attempts before you get it right. By partnering with suppliers of more than 40 IP modules and 200 separate IP components, TSMC is hoping to minimize the failed design attempts.
The company plans to align with some 10 to 12 vendors to create a set of design rules and qualify specific IP libraries that, he claims, will maximize yields and speed time to market. This is critically important to all chip makers, including integrated device manufacturers (IDMs) - companies that design and build their own semiconductors, such as IBM Corp., Motorola Inc. or Advanced Micro Devices Corp. (AMD). "IDMs don't sell wafers; they sell product," he states.
But while TSMC will be creating this set of design rules, it will not make public the details of the rules, such as how specific components work. "Only the rule will be released, not the technology behind it," he says. That information is proprietary and part of the company's competitive edge.
Ultimately, says TSMC's CTO Calvin Chenming Hu, TSMC plans to offer a family of processes for complementary metal-oxide silicon (CMOS) logic, including high-performance, low-power, mixed-signal/radio-frequency and embedded memory options.
TSMC's Nexsys program already is gaining support from third-party chip and IP providers. In April, just a month after TSMC's launch, Motorola, STMicroelectronics NV and Philips Electronics NV announced a five-year alliance that calls for the construction of a $1.4-billion research and development facility in Crolles, France. According to a joint press release by the partners, "TSMC will be a valued participant to achieve alignment of CMOS platform technology between the alliance and TSMC's commercial foundry process." This announcement underscore's TSMC's plan to become the de facto standard by gaining the support of its business partners.
"I don't see this as being a departure from the foundry model," says Jim Hines, principal analyst for semiconductors at Dataquest, the San Jose, CA-based market research firm and a unit of Gartner Inc. A large number of the companies that use pure-play fabs are chip designers that don't have their own fabrication facilities, he says. Using the design rules recommended by the foundry is the most common way of doing business for fabless companies.
There is no debate that fabless chip companies are using foundries, however, a number of IDMs also use foundries to build some of their semiconductors.
"Larger IDMs - that's been more of a gray area," says Hines. Whether a foundry will forego its preferred design rules in order to opt for its customer's rules is a significant financial decision, he says. Before a foundry will build a custom line, it must address this issue: "What's the ROI [return on investment] to take on a high level of customization?"Technology advance or marketing ploy?
JoAnn Itow, senior analyst for manufacturing at Semico Research Corp., a Phoenix-based market research firm that specializes in the semiconductor market, notes that TSMC has backed away from last year's positioning of Nexsys as a potential industry standard for core CMOS. Rather, she says, "it doesn't appear that [proposal] got much support." Instead, she says, she expects some of the smaller foundries and fabless semiconductor companies to market their products by saying: "I use the TSMC process."
"Branding of a process might be a service," she adds, "but it is not an important part" of the technology.
Some IDMs are customers of both TSMC and UMC, including Texas Instruments Inc., Dallas, and Infineon Technology AG, the Munich-based semiconductor manufacturer formerly known as Siemens Semiconductors. Infineon, one of the world's largest chip manufacturers with annual revenues of 5.67 billion Euros ($5.21 billion using an exchange rate of 1 Euro to U.S. $0.92), selects its foundry based on the needs of a specific product, says Jan du Preez, president of Infineon Technologies North America Corp., San Jose, CA. (Prior to publication of this article, Jan du Preez moved from Infineon to Micron Technology Inc. of Boise, Idaho, as vice president of the Networking and Communications Group. He was replaced as president of Infineon North America by Robert LeFort, formerly automotive and industrial vice president at Infineon.)
"I'm not sure how much [of TSMC's Nexsys program] is marketing and how much is really technology," he says diplomatically.
"Countries only have interests; they don't
have friends. It's the same here."
Three issues drive the determination of which foundry to use, or indeed if the company will shop out the foundry process or build the product itself, he says: Cost, which includes design, manufacturing and yield; performance and functionality; and time to market. Du Preez likens TSMC's marketing strategy to international politics. "Countries only have interests; they don't have friends. It's the same here."
TSMC's strategy is to build common interests with fabless semiconductor companies and IDMs, he says. If it can do so by setting forth design rules for 90nm nodes, then it will have business partners. If those common interests do not exist, then it is possible those companies might partner with UMC, Chartered, some other foundry or simply build it themselves, he adds.
Both Nexsys and the traditional approach of fabless semiconductor companies negotiating with foundries on design rules have pros and cons, says Gary Cheek, vice president of operations at Newport Beach, CA-based Conexant Systems Inc. The positive aspect to Nexsys are a rigid, well-documented system. "The advantage is that it is a standard offering, not changing, and is documented well. The foundry and the customer are working off the same sheet of music," he says.
While Cheek says he "buys into higher yields" from standardized processes, he warns, "there is no competitive edge if all the customers are using the same, standard technology."
Fu Tai Liou, chief sales and marketing officer at UMC, underscored that point. "Most of the time, standards kill innovation," he says.
UMC will continue to work with its customers to set design rules, he says. However, for customers that have no design rules of their own, UMC does have recommended rules. The company plans to release its first 300mm wafers by year's end.
Like UMC, Chartered also plans to work with its customers on design rules, but it also offers set rules for its customers who depend on the foundry to set the baseline, Buehler-Garcia says. Chartered already released its first 300mm wafers last year and plans commercial customer shipments of 90nm SRAM chips in the second quarter of next year.
"The definition of a foundry is that the
customer gets complete freedom of choice, versus the ASIC model, where
you give up complete control in exchange for complete production" handled
by the foundry.
Buehler-Garcia says TSMC's branding strategy could be a "good thing," but customers need to be clear about exactly what the company is trying to brand. Chartered's approach, he says, is to provide "electrical equivalents" to the customer's specifications. So long as the electrical-equivalent modules meet the customer's needs, he says, Chartered can provide its own standardized module. However, customers still have the flexibility to override that module.
"How much time does the customer have to get to market?" he asks. "If it's short, they [can purchase IP modules] off the shelf. If they have time, they can do a custom job."
As one might expect, TSMC customers are supporting its position, while those that are customers of UMC, Chartered and others agree with Buehler-Garcia. At AMD, for example, John Greenagel, director of strategic communications says the TSMC approach will have "no impact." The company, which currently outsources foundry work to UMC, is qualifying 130nm technology to augment its Athlon microprocessor, but sets its own design rules for UMC to follow. A fab that will build 90nm devices in Dresden, Germany, is being build with UMC. It's 65nm node technology - a generation beyond 90nm - and will be developed jointly with UMC in Singapore. It will be a 300mm fab, with production scheduled for 2005.The question of portability
While acknowledging that some customers do not currently have their own design rules, UMC's Liou questions why a customer that has advanced designs would want to be forced into a foundry's rule set. Making it possible for companies to second source their semiconductors among foundries is something of a straw man, he says. "It depends on the application," he notes. "Logic design is much more forgiving, but mixed-mode semiconductors are more difficult to move from fab to fab," he says.
In the case of IDMs, he adds, UMC will first look at the design rules the IDM provides, then look at its own design rules for the same type of product. UMC then works with the customer on those parts of the design rules where UMC's rules are tighter than those provided by the customer to build the best chip.
One point all the foundries agree on is that design rules, like time to market and customization, are part of the service they provide fabless designers and IDMs. Service, they agree, is what separates the companies more so than even technology, although all three foundries claim to be technology leaders.
While analysts and customers try to determine if TSMC's position is drawn from strength in technology or marketing, they acknowledge that, at least on the surface, the TSMC approach has some merit.
"The power relationships in chip manufacturing are evolving rapidly," says Alex Stuart, director of semiconductor research at Framingham, MA-based International Data Corp. (IDC). As IDMs move some of their cyclical products to foundries, the foundry business is becoming more cyclical. But cyclical production can complicate a company's business plan. To keep the products flowing smoothly through, TSMC is trying to control the production.
"It's the Hong Kong suit approach; it's the same type of mentality," Stuart adds. By limiting the number of possible combinations of modules, TSMC can ensure that the products it produces are uniform in quality and quickly manufactured.
It's still too soon to tell if IDMs and fabless semiconductor companies will choose to support TSMC's standardized design rules, he says. The financial and strategic investments are significant, but the industry is still roughly a year or so away from determining the success of TSMC's game plan.
Stephen Lawton, a freelance writer in San Bruno, CA, is the former editor-in-chief of MicroTimes, Digital News & Review, NetscapeWorld and SunWorld. Send him e-mail at Lawton@afab.com.
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